Joe Chen

Signalling Design and Review Engineer

With a comprehensive knowledge of developing and designing high quality signalling systems, Joe has a Bachelor of Engineering (Electrical and Computer) and 9 years of experience as a Signalling engineer in the Rail Industry.

Joe is RPEQ and an associate member of the IRSE, his key skills and expertise include executing detailed circuit design, WESTRACE interlocking data (MK I & MK II) design, WESTECT ATP Transponder data design, FUTUR 1300 ETCS Level 1 data design, and documenting and providing support installing WESTRACE/ETCS Level 1 data during commissioning.

He has a proven track record of successfully preparing and executing projects in accordance with company procedures and specific client requirements.

Joe Chen